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PIERS Online
Vol. 3
No. 7
2007
pp: 968-970A 0.7V Transformer-Feedback CMOS Low-noise Amplifier for 5-GHz Wireless LANHui I Wu, R. S. Fan, and Christina F. Jou doi:10.2529/PIERS060907035333 Downloads: 1750 Abstract:In this paper, we present a 0.7 V low-noise amplifier(LNA) using monolithic transformer feedback to neutralize the gate-drain overlap capacitance of a field-effect transistor(FET). It is a single-ended amplifier implemented in 0.18-μm CMOS technology designing for 5-GHz wireless local-area networks (LANs). This LNA achieves a simulated power gain of 10.84 dB, noise figure(NF) of 2.4 dB, and input referred 1 dB compression point (P1 dB) of -8 dBm at 5.8 GHz. Operating from a 0.7-V supply, the power consumptions for the low noise amplifier(LNA) are 4.8 mW.References:1. Shaeffer, D. K. and T. H. Lee, "A 1.5 V, 1.5 GHz CMOS low noise amplifier," IEEE Journal of Solid-state Circuit, Vol. 32, No. 5, May, 1997. 2. Manku, T. and et al., "A low-voltage design technique for RF integrated circuit," IEEE Transaction on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 45, No. 10, October, 1998. 3. Wang, Y., M. Z. Khan, and K. Iniewski, "A 0.65 V, 1.9 mW CMOS low-noise amplifier at 5 GHz," Proceedings of the 9th International Database Engineering & Application Symposium, 2005. 4. Cassan, D. J. and J. R. Long, "A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS," IEEE Journal of Solid-state Circuits, Vol. 38, No. 3, March, 2003. 5. Nguyen, T.-K. and et al., "CMOS low-noise amplifier design optimization techniques," IEEE Transactions on Microwave Theory and Techniques, Vol. 52, No. 5, May, 2004. 6. Lee, T. H., The Design of CMOS Radio-frequency Integrated Circuits, Cambridge University Press, Cambridge, UK, 1998. |
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